Greg Waite, CEO and Founder of InventionShare, announced today from the International Solid-State Circuits Conference (ISSCC) in San Francisco that Circuit Seed™ has completed initial independent testing on their Enigma IC build with Global Foundries 130nm CMOS technology. The test results show a very strong correlation to the simulation results, which validates the claims and performance of circuit designs presented to industry partners for consideration. Mr. Waite said, “We are extremely pleased with the results as the circuits performed to the expectations of the inventors.” The tests were recently completed by Desert Microtechnology Associates in Phoenix, Arizona.
Ron Laurie, Chairman of InventionShare and team strategist for the Circuit Seed invention portfolio, said, “Looking forward, we expect Circuit Seed designs on small IC nodes (<28nm) including FinFETs will perform even better.”
The Complementary Current Injected Field Effect Transistor (CiFET) is the basic building block. It is fabricated using standard, nanoscale CMOS logic process nodes with no extensions. It is built on the same silicon and it can be co-mingled with co-resident CMOS digital circuits. For the first time, ultra-high performance analog circuit constructs LNAs, Modulators, PLLs, amplifiers, analog-to-digital converters, digital to analog converters may be fabricated on the same silicon with high-performance digital circuits.
Specifically, two amplifier circuits have been fabricated. The first is the single stage CiTIA amplifier with a designed 100-ohm input resistance. This CiFET amplifier element is a basic construct with differential in and out possible. Alone, it can be designed to provide a single stage gain in excess of 20db. Signal current injected into its niNode is the drive. Its simplicity is the prototype for a very wideband RF LNA. Measurements of noise density and total harmonic distortion plus noise were made using the best equipment available. The input resistance across a frequency band was also measured, confirming the CiFET’s designed input resistance was achieved and constant over the measured frequency band.
The second was the more complex operational amplifier, the CiOpAmp, which is a three-stage CiFET device with differential in and out and auto-zeroing. It produced an open loop gain in excess of 100dB. The opamp was then externally configured with feedback resistors to produce a closed loop gain of 20dB.
The testing of the physical devices produced results that matched the analog simulations using all-region models, including EKV. The devices were tested with Vdd supply of 1.4, 1.2, and 1.0 volt. The remarkable linearity between the injected iPort current in the output voltage was confirmed. The test fixture and the test equipment used presented a roughly 100kohm || 300 pF load to each externalized pad. To the extent that frequency response could be tested, the results match the simulations when the load was changed to match the test fixture’s actual net capacitance. Additional CiFETs may be placed in a parallel configuration to increase the pad drive capability; this will dramatically increase the CiOpAmps realized bandwidth. Notably, on this test chip, a single CiFET 130nm transistor drove this large capacitance load comfortably into the hundred-kilohertz range. The single CiFETs wide bandwidth capability was blunted by this huge capacitive load. Single CiFETs are not normally intended to be externalized but, rather, to drive internal IC loads.
Circuit Seed designs process analog signals with a 100% digital process node with no extensions. The CiFET analog circuits are RF LNA ultra-wideband, operate at low power supply voltages, have excellent SNR, and only require a fraction of the wafer space of traditional CMOS analog circuits. They are more resilient to process variations, noise, and operate over a dramatically wider temperature range than mil spec requires. The overall cost of developing, testing and producing CiFET analog circuits is reduced by simpler IC layouts, design modularity, design transportability, better performance, dramatically less wafer space, proven logic process node yields and they operate at very low supply voltages less than 0.6 v Vdd.
The detailed test results have been compiled and are available. Enigma Test Chips will be available to interested parties for testing upon request. Please contact Keith Taylor, VP Acquisitions, and Licensing email@example.com
Through InventionShare, Circuit Seed is currently socializing the inventions and working with several OEMs, semiconductor and sensor manufacturers, and is looking to partners for broad adoption of the technology in a variety of industry areas. InventionShare is attending the 2018 International Solid-State Circuits Conference (ISSCC) in San Francisco Feb 12-15 and will be meeting with various companies and parties interested in the invention technology.
InventionShare functions as a perpetual and exclusive ‘Breakthrough Invention Fund’ that creates and develops ‘Invention Companies’ – rather than high risk ‘Operating Companies’. This approach dramatically accelerates the adoption of breakthrough technologies by augmenting the innovation pipeline of large global companies – for extraordinary financial outcomes and high social impact. We do this by attracting and representing credible senior inventors with a track record, through our ‘inventor friendly’ success-based model, and we support, amplify, protect and validate their seminal inventions with non-dilutive financial capital – in stark contrast to operating companies. The dramatic financial and social leverage we achieve is through our deep and distinct intellectual and relationship capital; industry and IP expertise, intelligence tools, process, diligence, and discipline.
For information in regards to product development, partnering or licensing and for any special projects, contact:
Keith Taylor, Vice President Acquisition & Licensing
firstname.lastname@example.org or (613) 225-7236 Ext. 105